Refactor and implement interrupt handling and PIT driver

- Refactored CPU context structure for better readability.
- Enhanced corpse and exception structures with clearer formatting.
- Improved frame structure for consistency.
- Added interrupt flag operations for enabling and disabling interrupts.
- Implemented IDT (Interrupt Descriptor Table) operations including loading and setting gates.
- Created PIC (Programmable Interrupt Controller) initialization and masking functions.
- Developed PIT (Programmable Interval Timer) driver with initialization and handler functions.
- Established common interrupt handler structure and exception handling stubs.
- Added hardware IRQ handling for IRQs 0-15.
- Introduced IDT entry and gate descriptor types for better organization.
- Ensured proper handling of interrupt and exception vectors.

1 files changed, 2 insertions, 4 deletions

diff --git a/mirai/asm/cpu/control.zig b/mirai/asm/cpu/control.zig
index ec408c1..719c8bd 100644
--- a/mirai/asm/cpu/control.zig
+++ b/mirai/asm/cpu/control.zig
@@ -35,8 +35,7 @@ pub fn write_cr3(value: u64) void {
     asm volatile ("mov %[value], %%cr3"
         :
         : [value] "r" (value),
-        : .{ .memory = true }
-    );
+        : .{ .memory = true });
 }
 
 pub fn read_cr4() u64 {
@@ -63,6 +62,5 @@ pub fn invalidate_page(virtual_address: u64) void {
     asm volatile ("invlpg (%[address])"
         :
         : [address] "r" (virtual_address),
-        : .{ .memory = true }
-    );
+        : .{ .memory = true });
 }