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2026-03-27Refactor and implement interrupt handling and PIT driverBobby1-0/+1
- Refactored CPU context structure for better readability. - Enhanced corpse and exception structures with clearer formatting. - Improved frame structure for consistency. - Added interrupt flag operations for enabling and disabling interrupts. - Implemented IDT (Interrupt Descriptor Table) operations including loading and setting gates. - Created PIC (Programmable Interrupt Controller) initialization and masking functions. - Developed PIT (Programmable Interval Timer) driver with initialization and handler functions. - Established common interrupt handler structure and exception handling stubs. - Added hardware IRQ handling for IRQs 0-15. - Introduced IDT entry and gate descriptor types for better organization. - Ensured proper handling of interrupt and exception vectors.
2026-03-20Implement exception handling framework with hardware, software, and resource ↵Bobby1-0/+2
exception raising - Added `hardware.zig` for raising hardware exceptions from vectors and interrupts. - Introduced `raise.zig` to consolidate exception raising functions. - Created `resource.zig` for raising resource-related exceptions (memory, CPU, file limits). - Developed `software.zig` for raising software exceptions (assertions, aborts, user-defined). - Implemented `actions.zig` for parsing and encoding reply actions. - Added `catch.zig` for handling received exceptions. - Created `reply.zig` for constructing and sending exception replies. - Developed `recover` module for managing recovery operations (resume, skip, terminate). - Implemented rendering modules for displaying exception and context information. - Established global state management in `state.zig` for tracking exceptions. - Defined various types (context, exception, frame, identity, port) in `types` directory.
2026-02-25Add Global Descriptor Table (GDT) and Task State Segment (TSS) implementationBobby1-0/+1
- Introduced GDT constants, including selectors, access rights, and flags. - Created GDT entry structures for kernel and user segments, along with TSS descriptors. - Implemented GDT initialization and loading functions. - Developed boot sequence phases for CPU and memory initialization. - Added boot information structure to manage memory regions and kernel details. - Implemented TSS management, including core-specific TSS setup and stack allocation. - Established state management for boot sequence phases and TSS.
2026-02-25feat: Add common constants, errors, and serial driver functionalityBobby1-0/+4